Challenges in Verification of Semiconductor designs for IoT Devices

Authors: Niranjana Gurushankar

DOI: https://doi.org/10.5281/zenodo.14280313

Short DOI: https://doi.org/g8ttk8

Country: USA

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Abstract: The Internet of Things (IoT) demands semiconductor devices that are smaller, power-efficient, and increasingly complex, posing significant verification challenges. This paper explores these challenges, focusing on design complexity, ultra-low power verification, and robust security. This paper analyzes contemporary strategies like formal verification, emulation, and the rising role of machine learning in automation. Furthermore, the paper also highlights the importance of shift-left approaches and the use of virtual prototypes. Finally, we identify open research problems and future trends, including the need for improved tools and standardized verification frameworks for the evolving landscape of IoT devices.

Keywords: Semiconductor, IoT, Design Verification, Low-Power Verification, Emulation, IoT Design Challenges, Security.

Paper Id: 231747

Published On: 2021-03-03

Published In: Volume 9, Issue 2, March-April 2021

Cite This: Challenges in Verification of Semiconductor designs for IoT Devices - Niranjana Gurushankar - IJIRMPS Volume 9, Issue 2, March-April 2021. DOI 10.5281/zenodo.14280313

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